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About

Amutha Bharathi is an Engineer and a Maker; He holds a Masters degree in Electrical Engineering from University of Minnesota - Twin Cities and a B.Tech in Electrical & Electronics Engg from National Institute of Technology-Tiruchirappalli, TN, India.

Areas of Interest: 
   Single Board Computers, Neural Networks, Deep learning, VLSI Systems, Microcontrollers & Microprocessors, Computer Architecture, GP-GPU Computing (CUDA), Image Processing & Robotics.

For more details , please visit his Linkedin profile.

A little more..

    Bharathi's fascination towards electronics dates to his pre-teen days when he used to make small DC motor cars. However, his venture into actual electronics(transistors, Op-Amp, Timers etc) started when he was 14. He designed an "Automatic Head light controller based Anti-Collision system" for vehicles. This pushed him among the top 30 contestants short-listed for "BalaShree" award for creative science. Though he didn't win the award, this contest turned out to be the abrupt acceleration point of his zeal towards electronics.

   His high school days were spent on random Electronics books and magazines leading to numerous mini projects. And his college years were filled with Microcontrollers, FPGAs, Image processing, Robotics,etc. He was a member of "Robotics and Machine Intelligence(RMI)", a group of student enthusiasts in NIT-Trichy where he held the position of Vice President of RMI working on various projects and served the students through technical-workshops and personal guidance. He has taken part in various events, conducted workshops in and around the college.

    Besides electronics, he enjoys tinkering with engines, building motorized bikes, modding his Subaru Forester into an off-road overlander and exploring the beautiful PNW.

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Shell Scripting to Display Bar Graphs in Linux Terminal

 This week was quite hectic for me with course assignments and their merciless deadlines. One such assignment in Advanced Computer Architecture  was simulation of various benchmarks in alpha architecture in simplescalar , a well-known computer architecture simulator. I was supposed to run a total of 4 benchmarks with different configurations of cache memory, instruction issue widths, commit widths, in-order execution modes, etc and I had to plot the required performance parameters for every benchmark. A conservative estimate would be around 40 plots!  Since the simulation platform was Linux, I could breathe a sigh of relief since most things can be automated using a powerful tool called shell. Scripting made my life easier here since I can automate a bunch of simulations without having to keep an eye on each and every simulation which would take anywhere from 20 minutes to 20 hours.  The problem arose when it came to plotting the performance results. Becau...
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Programming STM32 ARM microcontrollers in Arch Linux

Once upon a time, not so long ago, the 8-bit microcontrollers were ruling the hobbyist embedded world. But today, the 32-bit ARM Cortex Microcontrollers are so inexpensive and power efficient that there is no good reason to ignore them. Here, let us see how to program a STM32 ARM cortex Microcontroller in Linux environment. The specific microcontroller used here is an STM32F103C8 (ARM cortex M3) programmed in Arch linux. Components Generic STM32F103 board (blue pill) STLINK-V2 (STM32 programmer) Female-Female connectors All the above components can be bought from ebay for less than $10 total. The STLINK-V2 is optional since you can use any of USB-SERIAL converters like FT232, CP2102, PL2303, CH340 and the built-in UART bootloader of STM32 chip to program. So if you already have any of the above serial converters, you don't really need STLINK to program the STM32F103 microcontroller. But STLINK helps if you plan to use in circuit debugging functionalities. Software The...
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JTAG - Test Access Port (TAP)Controller based Xilinx FPGA configuration using Raspberry Pi

JTAG - Joint Test Action Group is an IEEE 1149.1 standard used in many silicon devices for programming and debugging purposes. Xilinx FPGAs support this JTAG protocol for their configuration. Here I have designed a JTAG FPGA bitstream programmer using Raspberry Pi which programs the bit file into FPGA in fraction of seconds!  JTAG physical bus has four lines: TMS (Test Mode Select) TDI (Test Data In) TDO (Test Data Out) TCK (Test Clock) Components Used:  Raspberry-Pi Xilinx Spartan 3E FPGA (XC3S250E in Papilio One) Jumper wires BLOCK DIAGRAM: TAP CONTROLLER: The TAP(Test Access Port) controller is a state machine inside the FPGA which changes it's state based on TMS input. For instance, let us assume that the state machine is in " Test-Logic-Reset " state. Now if I drive the TMS pin low and toggle the TCK pin, the state machine will go to " Run-Test/ Idle " state. This is how we move to different states.  Note ...
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