Sipeed Maix Bit, a 64-bit dual core RISC-V AI development board

Sipeed MAIX is one of the cheapest RISC-V development boards in the world. It is a dual-core module capable of running at 400MHz (can be overclocked to 800MHz) and has Neural Network Accelerators topping at 0.5 TOPS with Tensorflow Lite support. Unable to resist, I backed the Indiegogo campaign and received the boards couple of weeks ago.

One more feature of this $12 super-spec-ed development board is that it supports MicroPython. It was time for a "Hello World" program.

Components

Sipeed MAIX Bit development board
USB Type-C data cable
Linux Laptop (I used Arch Linux )

The development board has CH-340 chip, the infamous USB-Serial adaptor. So once you connect the USB Type-C cable to your host computer, it will be enumerated as a usb serial device.

Note the QinHeng Electronics HL-340 USB-Serial adapter. That is our Sipeed MAIX device's USB-Serial interface. Now this comes pre-programmed with the default firmware. You can find all the firmware, SDK and examples from their github repo.

If you want to flash the latest firmware, download the latest firmware from here.

sudo ./kflash.py -p /dev/ttyUSB0 -b 115200 ../maixpy_v0.1.1_beta.bin

After flashing the latest firmware, you can login to the device through a serial terminal program like putty or minicom and start MicroPython-ing :)

Pressing reset button will reboot the board and will bring up a MicroPython prompt.
Now let us try to blink the on-board LEDs. Sipeed MAIX BIT has an RGB LED wired to 3 GPIOs in active-low configuration. i.e The GPIOs act as current sink here and not as a source to drive the LEDs. We have to map those GPIOs, configure them as outputs and drive them in a loop.

Now let us write a loop to cycle through all 8 combinations of these 3 LEDS. I am adding a counter variable and masking just the last three bits of the counter to feed as logic values for the LEDs.

You can see the RGB LEDs in action below !

Comments

Shell Scripting to Display Bar Graphs in Linux Terminal

This week was quite hectic for me with course assignments and their merciless deadlines. One such assignment in Advanced Computer Architecture was simulation of various benchmarks in alpha architecture in simplescalar , a well-known computer architecture simulator. I was supposed to run a total of 4 benchmarks with different configurations of cache memory, instruction issue widths, commit widths, in-order execution modes, etc and I had to plot the required performance parameters for every benchmark. A conservative estimate would be around 40 plots! Since the simulation platform was Linux, I could breathe a sigh of relief since most things can be automated using a powerful tool called shell. Scripting made my life easier here since I can automate a bunch of simulations without having to keep an eye on each and every simulation which would take anywhere from 20 minutes to 20 hours. The problem arose when it came to plotting the performance results. Because, each simulation

Programming STM32 ARM microcontrollers in Arch Linux

Once upon a time, not so long ago, the 8-bit microcontrollers were ruling the hobbyist embedded world. But today, the 32-bit ARM Cortex Microcontrollers are so inexpensive and power efficient that there is no good reason to ignore them. Here, let us see how to program a STM32 ARM cortex Microcontroller in Linux environment. The specific microcontroller used here is an STM32F103C8 (ARM cortex M3) programmed in Arch linux. Components Generic STM32F103 board (blue pill) STLINK-V2 (STM32 programmer) Female-Female connectors All the above components can be bought from ebay for less than $10 total. The STLINK-V2 is optional since you can use any of USB-SERIAL converters like FT232, CP2102, PL2303, CH340 and the built-in UART bootloader of STM32 chip to program. So if you already have any of the above serial converters, you don't really need STLINK to program the STM32F103 microcontroller. But STLINK helps if you plan to use in circuit debugging functionalities. Software The

JTAG - Test Access Port (TAP)Controller based Xilinx FPGA configuration using Raspberry Pi

JTAG - Joint Test Action Group is an IEEE 1149.1 standard used in many silicon devices for programming and debugging purposes. Xilinx FPGAs support this JTAG protocol for their configuration. Here I have designed a JTAG FPGA bitstream programmer using Raspberry Pi which programs the bit file into FPGA in fraction of seconds! JTAG physical bus has four lines: TMS (Test Mode Select) TDI (Test Data In) TDO (Test Data Out) TCK (Test Clock) Components Used: Raspberry-Pi Xilinx Spartan 3E FPGA (XC3S250E in Papilio One) Jumper wires BLOCK DIAGRAM: TAP CONTROLLER: The TAP(Test Access Port) controller is a state machine inside the FPGA which changes it's state based on TMS input. For instance, let us assume that the state machine is in " Test-Logic-Reset " state. Now if I drive the TMS pin low and toggle the TCK pin, the state machine will go to " Run-Test/ Idle " state. This is how we move to different states. Note

Electronics Adventures

Search This Blog